NEO Semiconductor has announced the launch of NEO.AI, a next-generation memory platform designed to address two of the biggest challenges limiting the performance and scalability of artificial intelligence systems like on-chip memory capacity and high-bandwidth memory (HBM) density.
The platform brings together two technologies, X-SRAM and 3D X-DRAM in a unified architecture aimed at increasing on-chip memory, HBM capacity, processor utilisation and long-term scalability.
As AI models become larger and more complex, memory has emerged as a major constraint on system performance.
Conventional SRAM is facing increasingly difficult scaling challenges at advanced process nodes, while current HBM architectures remain limited by the scaling constraints of conventional two-dimensional DRAM. Together, these challenges have created what the company describes as the “AI Memory Wall.”
X-SRAM targets on-chip memory density
NEO says its X-SRAM technology can deliver up to five times the memory density of conventional SRAM while maintaining SRAM-class performance and compatibility with advanced nanosheet CMOS processes.
The technology is also designed to support a future transition to monolithic 3D X-SRAM implementations, offering a potential path to further increases in on-chip memory density.
3D X-DRAM aims to expand HBM capacity
The company’s 3D X-DRAM technology uses established 3D NAND manufacturing processes to deliver up to 10 times the capacity of conventional DRAM, according to NEO Semiconductor.
A proof-of-concept validation has demonstrated the technology’s potential as a scalable and manufacturable approach for next-generation HBM applications.
NEO Semiconductor Founder and CEO Andy Hsu was scheduled to introduce the NEO.AI platform during a keynote presentation at 11:00 a.m. PDT on August 5 at FMS: The Future of Memory and Storage. The presentation covered X-SRAM and 3D X-DRAM, which the company says are designed to address the two largest memory bottlenecks in AI systems.
FMS 2026 was held from August 4 to 6 at the Santa Clara Convention Center in Santa Clara, California. NEO Semiconductor also exhibited at Booth #507 throughout the event.
To schedule a meeting with the NEO Semiconductor team during FMS 2026, contact mayalustig@neosemic.com.
Leadership Comments
“Memory innovation is becoming critical for the future of artificial intelligence,” said Andy Hsu, Founder and CEO of NEO Semiconductor. “With NEO.AI, we are introducing breakthrough technologies that address AI’s two biggest memory bottlenecks. X-SRAM dramatically expands on-chip memory density, while 3D X-DRAM dramatically increases HBM capacity. Together, they provide a scalable memory foundation for the next generation of AI systems and represent an important step toward breaking the AI Memory Wall.”
Stan Shih, Founder and former Chairman and CEO of Acer, former TSMC Board Director for over 20 years, and Advisory Board Member of NEO Semiconductor, added: “AI is rapidly transforming industries around the world, and memory will be one of the most critical technologies enabling the next stage of AI. I am pleased to see NEO Semiconductor continue to introduce innovations such as X-SRAM and NEO.AI, which provide a promising new direction for overcoming AI memory bottlenecks. I look forward to seeing these innovations create new opportunities for the global semiconductor industry and AI ecosystem.”
To Know More: CLICK HERE
