AttoTude has reduced its integrated circuit design cycles to less than six weeks after expanding its use of Keysight EDA software across its full IC design workflow, according to Keysight Technologies.
The move has helped AttoTude cut design cycles by more than 50% while achieving first-pass silicon success across advanced RF, sub-THz and THz tape-outs supporting its guided-wave interconnect platform.
The results come as semiconductor companies face increasing pressure to bring complex designs to market faster while avoiding expensive silicon respins. Global semiconductor revenue is forecast to exceed $1.3 trillion in 2026, with AI semiconductors expected to account for 30% of the market.
For companies developing AI interconnect technologies, faster design cycles can be critical to delivering the bandwidth, efficiency and scalability required by next-generation data center infrastructure.
AttoTude Targets 800G Per-Lane Connectivity
AttoTude develops integrated circuits supporting 200G, 400G and 800G per-lane data rates. At these speeds, on-chip interconnects behave like waveguides, making accurate electromagnetic simulation an essential part of the design process.
The company’s engineers work simultaneously on sub-THz and THz subsystems, creating complex design and coordination requirements. Without a shared, version-controlled environment, managing these parallel workloads and maintaining consistency across designs can make first-pass silicon success considerably more difficult.
By using the Keysight Advanced Design System (ADS) platform, AttoTude has been able to streamline this process. Its designs have consistently met specifications on first silicon while the overall design cycle has fallen to less than six weeks.
One Design Environment for Complex Silicon Development
AttoTude is also using Keysight’s design data management software to maintain a single source of truth across its design environment.
The approach provides engineers with visibility and traceability throughout the design process, while helping teams coordinate data across different development stages.
System-level scenario planning allows engineers to evaluate design trade-offs before committing designs to silicon. The workflow also uses simulation-to-measurement correlation to check whether simulated results accurately reflect actual device performance.
This consistency becomes increasingly important as operating frequencies move from RF into the sub-THz and THz ranges. Keeping layouts, electromagnetic models and simulation data aligned can help reduce design errors and improve confidence before tape-out.
For AttoTude, the combination of faster design cycles and first-pass silicon success is aimed at helping the company accelerate development of its guided-wave interconnect technology as AI infrastructure drives demand for higher bandwidth and more efficient data movement.
Leadership Comments
Richard Chan, ASIC Architect and Development Leader, AttoTude, said: “Developing an ASICs over Dielectric interconnect platform that spans signaling frequencies from 100 GHz to 3 THz requires an exceptional level of design accuracy and simulation fidelity. Keysight’s EDA software has enabled our engineering team to move faster with greater confidence, helping us accelerate development while consistently achieving first-pass silicon success.”
Nilesh Kamdar, General Manager, Keysight EDA, said: “At Keysight, we measure success by what our customers achieve. The next generation of AI infrastructure will be built by the teams that move from design to silicon fastest, and AttoTude is proving what that speed makes possible.”
