The University of Hyderabad has rolled out two intensive internship programmes in semiconductor technology and VLSI design.
Rather than leveling with theory-driven classes, the new internship programmes are learned to match the pace of India’s growing chip ecosystem and the kind of skills the industry now expects.
At the heart of this push is CASEST, the Centre for Advanced Studies in Electronics Science and Technology. The centre is running two parallel three week internships that go on till July 21, one focused on VLSI design and the other on semiconductor fabrication. The idea is simple but powerful.
Take what students learn in classrooms and put it into practice with real tools, real workflows and realistic constraints, so they are better prepared for roles across the semiconductor manufacturing and design value chain in India.
This batch brings together 60 students. Of these, 40 are on the VLSI design track and 20 are inside fabrication labs working on process side tasks. Both groups get structured exposure to advanced electronic design automation tools and cleanroom practices.
For many of them, this will be the first time they see how a design moves from code and schematics to layouts, masks and processed wafers, or how a fab actually feels and functions day to day. That early familiarity matters when they eventually walk into a commercial or research fab.
The VLSI design internship, led by Dr Anjali Priya, walks students through the critical stages of integrated circuit design in both digital and analog domains.
They see the flow from RTL and synthesis to timing analysis, layout and ultimately hardware implementation.
Beyond the specific tools and steps, the message is clear. CASEST is set up as a Chip to Startup institute with a mandate to train around one hundred students in VLSI every year, and these internships are one of the key channels through which that mandate is delivered.
Running alongside this is the semiconductor fabrication track coordinated by Dr S L D Varma. Here, interns spend time in cleanroom environments in collaboration with the Centre for Nanotechnology.
They work directly with core processes such as lithography, thin film deposition and etching. In similar programmes at the university, each intern is expected to fabricate and test thin film transistor structures on compound semiconductor substrates, giving them a hands on feel for device fabrication rather than just reading about it in a textbook.
When CASEST head Prof Samrat Sabat talks about these internships, he frames them as part of a larger effort to build a workforce that can meaningfully support India’s fast growing semiconductor ambitions.
With production linked incentives, new fab proposals and a national focus on electronics manufacturing, universities can’t afford to stay on the sidelines. Programmes like these help create a talent pool that understands both design and process, and can plug into industry with far less ramp up time.
This University of Hyderabad initiative fits into a broader pattern that is likely to pick up speed in the coming years. Centres of excellence are moving beyond conventional semester long coursework and into short, intensive, tool heavy internships that act as on ramps into specialised MTech programmes and real industry roles.
As India’s semiconductor roadmap develops, dual track initiatives that cover both design and fab are going to be a crucial way to close the skills gap between what academia teaches and what the fab floor actually needs.
