The ESD Alliance is putting agentic AI at the center of its 2026 Executive Outlook, and that makes sense given how quickly chip design is evolving. The event will explore how these AI systems could reshape design and verification as they move from experiment to practical engineering use.

This year’s panel is themed “How Will Agentic AI Change Chip Design and Verification?” and will bring together executives and entrepreneurs from across the EDA and emerging AI ecosystem.
The discussion is set for June 10 at Cadence Design Systems’ headquarters in San Jose, with networking and dinner before the panel.
The panel will be moderated by Semiconductor Engineering’s Editor in Chief, Ed Sperling, and will feature Dave Kelf of Breker Verification Systems, Cindy Cui of ChipAgents, Shelly Henry of Moores LabAI, Ann Wu of Silimate, and Vince Wong of Verific Design Automation.
What makes this especially relevant is that agentic AI is being positioned not just as another productivity tool, but as a way to help engineers tackle complexity, speed up verification, and improve decision-making across the design flow.
That broader shift is already being discussed across the semiconductor industry, with companies exploring how AI can extend engineering capacity without replacing human oversight.
The panelists for the ESD Alliance 2026 Executive Outlook are: Dave Kelf of Breker Verification Systems, Cindy Cui of ChipAgents, Shelly Henry of Moores LabAI, Ann Wu of Silimate, and Vince Wong of Verific Design Automation.
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