A new gallium nitride transistor developed by researchers at EPFL has demonstrated the ability to withstand more than 3.4 kV, marking a significant advance for GaN based power electronics.
The gallium nitride transistor uses an approach called an intrinsic polarization superjunction, or iPSJ, which allows researchers to manage the electric field inside the transistor without relying on conventional intentional doping.
The research, led by scientists at the Power and Wide Band Gap Electronics Research Laboratory at EPFL, was published in Nature Electronics on August 28, 2026. The team demonstrated GaN on silicon transistors capable of blocking more than 3.4 kV, while related Schottky barrier diode structures exceeded 3.9 kV.
The development could have implications for high voltage power conversion in electric vehicles, renewable energy systems, industrial equipment and power infrastructure, where designers increasingly need devices that combine high voltage capability with low conduction losses.
Why high voltage remains a challenge for GaN
Gallium nitride has become an important material for modern power semiconductor development because it can support high electric fields while enabling fast switching and compact device structures.
GaN power devices are already widely used in applications such as compact chargers and power converters. However, pushing GaN devices into much higher voltage ranges presents a fundamental challenge.
When a high voltage is applied across a transistor in the off state, the electric field does not always distribute evenly through the device. Instead, it can become concentrated in specific regions. This can trigger premature breakdown and limit the amount of voltage the transistor can safely withstand.
Researchers have been exploring superjunction architectures to address this problem. In conventional superjunction devices, carefully balanced positive and negative charge regions help spread the electric field across the semiconductor.
Applying that concept to GaN has been difficult because achieving precise charge balance through conventional doping introduces manufacturing and temperature related challenges.
The EPFL team took a different approach.
Using GaN’s natural polarization
The new iPSJ structure takes advantage of the intrinsic polarization properties of III nitride materials.
The researchers engineered the GaN based heterostructure so that it naturally produces two mobile charge layers. One is a two dimensional electron gas, or 2DEG, while the other is a two dimensional hole gas, or 2DHG.
These charge carriers provide a natural balance between positive and negative charge within the device.
When the transistor switches off, both carrier populations can be depleted dynamically. This helps preserve charge neutrality in the drift region and produces a more uniform electric field rather than allowing voltage to accumulate sharply in one location.
Importantly, the approach does not depend on intentional doping to establish this charge balance. According to the research team, avoiding doping can improve temperature stability because the carrier concentrations generated by polarization remain comparatively stable across a broad temperature range.
Transistor withstands more than 3.4 kV
The researchers fabricated both depletion mode and enhancement mode iPSJ transistors. The enhancement mode device, which is particularly relevant to normally off power switching applications, demonstrated a breakdown voltage exceeding 3.4 kV.
The depletion mode version reached more than 3.5 kV.
The devices achieved these voltage levels without using field plates, relying instead on planar gate structures and the charge balancing produced by the intrinsic polarization superjunction architecture.
The result is notable because many commercially available GaN power devices operate in substantially lower voltage classes. EPFL said its demonstrated transistor can withstand more than five times the voltage of commercial GaN devices in the 600 V to 650 V range.
The achievement should not be interpreted as the highest voltage ever demonstrated by a GaN transistor. Earlier research has reported higher breakdown voltages using different materials and device structures. The significance of the EPFL work lies in combining high voltage operation with a doping free charge balancing approach on a GaN on silicon platform.
Low dynamic resistance could be equally important
Voltage blocking capability is only one part of the challenge in high power semiconductor design. A device also needs to maintain low resistance when it is switched on. Excessive resistance increases conduction losses and generates heat, which can reduce efficiency and complicate thermal management.
This is where the EPFL research presents another important result.
The researchers reported less than 15 percent degradation in dynamic on resistance under voltage stress up to 3 kV. The devices also showed repeatable and temperature stable breakdown characteristics.
The research team also reported that the Schottky barrier diode version of the iPSJ architecture achieved a breakdown voltage above 3.9 kV with a specific on resistance as low as 4.7 m? cm².
For the transistor structures, the demonstrated specific on resistance was 6.3 m? cm² for the depletion mode device and 11.1 m? cm² for the enhancement mode device.
These figures point toward a potential way of addressing one of the central tradeoffs in high voltage power electronics, where increasing breakdown voltage can often come at the cost of higher conduction resistance.
GaN on silicon could improve scalability
Another important aspect of the work is the substrate.
The devices were fabricated using GaN on silicon rather than relying exclusively on more expensive specialty substrates. Silicon substrates are attractive for power semiconductor manufacturing because of their established availability, scalability and compatibility with existing semiconductor processing infrastructure.
The EPFL research therefore combines three elements that are important for future power devices: high voltage blocking, low resistance and a silicon based platform.
The team also reported that the diode structures maintained breakdown voltages above 3.3 kV at temperatures reaching 125°C, with the observed limit associated with breakdown in the GaN on silicon buffer.
That temperature performance is particularly relevant to power electronics, where semiconductor devices can experience substantial thermal and electrical stress during operation.
Potential impact on EVs and renewable energy
High voltage GaN devices could eventually expand the material’s role beyond the lower voltage power conversion applications where it is already established.
Electric vehicles are one potential area.
Higher voltage vehicle architectures require power semiconductors capable of handling increased electrical stress while keeping switching and conduction losses under control. Similar requirements exist in solar power systems, energy storage, industrial motor drives and high voltage power conversion.
AI data centers are another emerging application area. The rapid growth of AI computing is increasing demand for power delivery systems capable of handling much larger electrical loads efficiently. Reducing conversion losses can translate directly into lower heat generation and improved overall system efficiency.
EPFL researchers highlighted AI data centers, electric vehicles and renewable energy systems as areas where compact high voltage power electronics could be valuable.
The road from laboratory device to commercial product
Despite the impressive voltage results, the technology remains at the research stage.
A laboratory demonstration does not automatically translate into a commercially deployable power transistor. Further work will be needed to establish long term reliability, manufacturing consistency, current handling capability, thermal performance and scalability across larger wafer areas.
The research does, however, address an important limitation in high voltage GaN development.
Rather than relying on increasingly complex doping schemes or field management structures, the iPSJ approach uses the material’s own polarization properties to establish charge balance.
The EPFL team now plans to combine the high voltage architecture with approaches that use multiple conduction channels to lower resistance and reduce heat generation.
If those developments can be successfully integrated, the result could be a new class of GaN power devices capable of moving deeper into high voltage applications while retaining the compactness and efficiency advantages that have made GaN attractive in the first place.
For the power semiconductor industry, the significance of the 3.4 kV result is therefore not simply the voltage number.
It is the demonstration that GaN on silicon can be engineered to manage extreme electric fields through intrinsic charge balancing, potentially creating a new route toward efficient high voltage power conversion.
References
Nature Electronics
Mazzone, L., Zong, Y., Zhu, H. et al., Intrinsic polarization superjunctions in III nitride heterostructures for efficient power electronics, published August 28, 2026. Nature Electronics research paper
EPFL
New transistor brings high voltage to microchip scale, August 31, 2026. EPFL research news release
Interesting Engineering
Next-gen power chips top 3,400 volts in 5x voltage leap for future EVs. Interesting Engineering source article
