Anritsu Corporation declared that it has assisted AMD in expediting the electrical compliance testing for pre-production AMD EPYC CPUs in accordance with the PCI Express (PCIe) specification.
Testing was conducted under challenging backchannel conditions with insertion loss exceeding the specified 27 dB in the CEM specification, along with stress conditions applied using Spread Spectrum Clocking (SSC), in order to achieve a maximum data rate of 64 GT/s using the high-performance Anritsu BERT Signal Quality Analyzer-R MP1900A.
The next-generation PCIe 6.0 standard offers a high-speed interface between internal devices including CPUs, GPUs, SSDs, and network cards, with a bandwidth of 64 GT/s per lane and up to 256 GB/s in an x16 configuration.
It achieves extremely dependable and efficient communications in domains like artificial intelligence (AI), high performance computing (HPC), and high-speed storage while remaining compatible with earlier standards. This significantly enhances the performance of analytical systems and next-generation data centers.
Leadership Comments
“In collaboration with Anritsu, we have achieved a stable demonstration of electrical compliance up to 64 GT/s,” said Amit Goel, corporate vice president, Server Engineering, AMD. “This early validation furthers our commitment to delivering reliable, high-speed I/O for future platforms powered by our next-generation AMD EPYCTM CPUs.”
“AMD is a key technology partner in advancing PCIe technology,” said Takeshi Shima, Director, Senior Vice President, Test & Measurement Company President of Anritsu Corporation. “We will continue to respond to various test needs and expand functions for PCIe compliance testing, while also contributing to quality evaluation and design efficiency of PCIe devices through proposals to standards organizations.”
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