MosChip Technologies will attend the TSMC 2025 North America Technology Symposium to demonstrate its turnkey ASIC, Silicon Design, and IP Services capabilities. MosChip, a long-standing member of the TSMC OIP Design Center Alliance (DCA), will highlight its technical competence spanning advanced technology nodes, packaging, test, and production workflows, with a track record of over 200 SoC tapeouts.
MosChip’s broad technical expertise in several industry areas enables worldwide customers to reduce time to market for complex silicon solutions.
Event Details:
What: At the TSMC 2025 North America Technology Symposium, MosChip will demonstrate its latest silicon engineering achievements and capabilities, including:
- RTL/Netlist to Silicon ASIC Turnkey Services for multi-million gate designs in 28nm HPC+ and 22nm ULL
- ASIC Design Services for 40+ designs a year in the last two years in technology nodes from 180nm to N2 in Server, Computing, Automotive, HPC, Consumer, Communication, IoT, Industrial, and Power Management domains
- Analog/Mixed-Signal IP hardening/porting services in N7, N6, N5, N3P and N3E
Who:
Available for media interactions and customer briefings:
- Srinivasa Kakumanu – CEO & Managing Director
- Swamy Irrinki – Senior Vice President, Worldwide Sales & Marketing
- Sribash Dey – Senior Vice President, NA & Europe Sales
- James Fife – Director of NA Sales
- Technical Leaders from the Silicon & Product Engineering Divisions
When: 23 April 2025, 8:30 AM
Where: TSMC 2025 North America Technology Symposium
Santa Clara Convention Centre, Booth #620
5001 Great America Parkway,
Santa Clara, California 95054, USA
For Further Info on TSMC OIP Design Center Alliance (DCA), CLICK HERE
