Arteris has crossed a major industry threshold, recording more than 1,000 customer silicon design starts powered by its interconnect IP. To mark the milestone, the system IP provider published The State of Semiconductor Innovation: Insights from 1,000 Design Starts, a comprehensive report tracking how SoC, ASIC, FPGA, and MCU architectures have evolved alongside the explosive growth of AI infrastructure, automotive electronics, and emerging physical AI systems.
The milestone underscores a fundamental shift in chip development. As computing moves toward multi-die chiplet designs and specialized accelerators, data movement and the system IP enabling it, has become central to semiconductor architecture.
Drawing from its internal design start records alongside industry research, the Arteris report highlights five major trends shaping modern silicon development:
- Interconnect IP commands significant silicon real estate: Across data centers, edge devices, and physical AI, network-on-chip (NoC) architectures now account for 10% to 13% of total chip and chiplet area, proving that data movement is just as critical as compute power.
- AI design activity has exploded: AI-related projects surged from just 4% of Arteris design starts between 2010–2014 to 50% between 2021–2025, driving intense demand for low-latency memory access and strict power efficiency.
- Enterprise and data center designs quadrupled: High-performance computing, cloud, and data center applications climbed from 11% of design starts to 43% over the same period, driven by the need for scalable data movement with lower total cost of ownership.
- Physical AI and safety-critical systems are converging: In automotive silicon, roughly two-thirds of design starts carry ASIL functional safety classifications, with nearly half blending safety compliance with AI computing capabilities for autonomous systems.
- Design complexity is compounding rapidly: Arteris data indicates a 9x spike in measured design complexity over the last two years alone, highlighting why hardware teams rely heavily on pre-verified, silicon-proven system IP to manage risk.
Beyond interconnect IP, the Arteris portfolio spans SoC integration automation and hardware security assurance software. These tools support everything from standard microcontrollers to complex, multi-die chiplet architectures across advanced process nodes.
As traditional systems companies increasingly build custom silicon alongside established semiconductor vendors, managing architectural complexity, power budgets, and time-to-market risks remains the industry’s central challenge heading into the next generation of chip design.
Leadership Comment
“Surpassing 1,000 design starts is an important accomplishment that reflects the growing importance of system-level innovation in semiconductor design,” said K. Charles Janac, president and CEO of Arteris. “As AI drives unprecedented demand for computing power, the ability to move data efficiently and optimize increasingly complex silicon architectures has become essential. Arteris recognized this challenge early and continues to pioneer technologies that enable our customers to push the boundaries of semiconductor innovation.”
The full report, The State of Semiconductor Innovation: Insights from 1,000 Design Starts, is available at CLICK HERE.
Learn more at arteris.com.
