STMicroelectronics and the National University of Singapore (NUS) have launched the ST-NUS HELIX Corporate Lab, a four-year research initiative aimed at advancing next-generation edge AI technologies and enabling new applications in generative and embodied AI.
HELIX, which stands for Hardware for Embodied Low-power Intelligent Xcceleration, brings together research across AI algorithms, accelerator architectures, low-power memory, circuit design, silicon technologies and application development.
The programme is designed to connect system-level research with silicon implementation, combining NUS’s research capabilities with STMicroelectronics’ semiconductor and system expertise.
The Corporate Lab is supported under Singapore’s Research, Innovation and Enterprise 2025 (RIE2025) plan and is hosted by the NUS College of Design and Engineering, with participation from the NUS School of Computing.
The lab was officially launched by Ms Low Yen Ling, Senior Minister of State, Ministry of Culture, Community and Youth, and Ministry of Trade and Industry, who attended the event as Guest-of-Honour.
Targeting the next generation of edge AI
As AI moves beyond cloud-based applications and into physical devices, the ability to process data close to where it is generated is becoming increasingly important. Edge AI can deliver faster responses, improve data privacy and energy efficiency, and maintain functionality in environments where connectivity is limited or intermittent.
HELIX will focus particularly on embodied AI, where intelligence is integrated directly into physical systems such as robots, humanoids and drones. These systems need to combine multimodal sensing, on-device computing and real-time actuation, often within compact and power-constrained hardware.
Meeting those requirements calls for advances across the technology stack, from AI models and software to system architecture, memory and semiconductor hardware.
The HELIX programme will explore system-level approaches that combine efficient computing, advanced memory architectures and application-driven design.
Research teams from STMicroelectronics and NUS will work together on research projects, talent development, intellectual property creation and technology demonstrations.
From AI algorithms to silicon
Research at the Corporate Lab will cover the full AI hardware stack, including AI models, system architecture, heterogeneous accelerators, on-chip memory hierarchies, circuit design, chip integration and silicon implementation.
A major focus at ST-NUS HELIX Corporate Lab will be memory-centric architectures, in-memory computing and scalable compute-and-memory systems. These areas are particularly important for AI workloads where moving data between memory and processing elements can account for a significant share of energy consumption.
The research will be supported by STMicroelectronics’ P18 18nm Fully Depleted Silicon On Insulator (FD-SOI) technology and embedded Phase Change Memory (PCM). The P18 FD-SOI platform supports ultra-low-power operation and adaptive body-biasing, while embedded PCM enables dense, non-volatile storage on the same die alongside on-chip SRAM.
By bringing processing and memory closer together, these technologies could help reduce energy-intensive off-chip data movement in memory-bound AI workloads.
STMicroelectronics will also provide NUS with a dedicated design chassis implemented using its proprietary P18 18nm FD-SOI technology. The platform will combine ST’s silicon, architecture, integration and engineering capabilities, giving researchers an industrial-grade foundation to develop and validate new AI accelerator concepts.
The design chassis is intended to reduce the infrastructure work required at the start of each research project, allowing teams to focus more directly on differentiated technologies. It could also help accelerate system-level validation and create a clearer route from technology development to industrialisation.
Tackling the challenges of AI at the edge
By bringing together advances in AI algorithms, accelerator architectures, memory systems, circuit design and semiconductor technologies, HELIX aims to address several challenges facing increasingly capable edge AI systems.
These include energy efficiency, memory bandwidth, latency, scalability and hardware integration, all of which are becoming increasingly important as AI moves into compact and resource-constrained devices.
Building Singapore’s semiconductor talent pipeline
Beyond technology development, the HELIX Corporate Lab is also expected to contribute to Singapore’s semiconductor and AI talent ecosystem.
The initiative will give students, researchers and professionals opportunities to work on industry-relevant projects and gain practical experience with emerging technologies. Participants will collaborate with researchers and industry experts while developing skills in AI systems, chip design and advanced semiconductor technologies.
Through this combination of R&D, industry collaboration and talent development, STMicroelectronics and NUS aim to strengthen Singapore’s capabilities in edge AI and advanced semiconductor systems while supporting the country’s ambition to remain a global hub for technology innovation.
Leadership Comments
NUS President Professor Tan Eng Chye said: “The ST–NUS HELIX Corporate Lab is a testament to the value of industry–academia partnerships in translating research into innovation. By combining NUS’ research strengths with STMicroelectronics’ industrial capabilities, we are building not only advanced, cutting-edge edge AI hardware, but also the talent and ecosystem that will help define the future of Singapore’s semiconductor and AI industries.”
Laurent Malier, Executive Vice President, Global Technology R&D at STMicroelectronics, said: “ST’s strength as an integrated device manufacturer lies in our ability to bring together advanced silicon technologies, embedded memory, circuit design, heterogeneous integration and chiplets. Through HELIX, we are creating an industrially relevant foundation to explore differentiated AI computing technologies and accelerate the translation of promising research into scalable semiconductor solutions.”
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