Renesas Tackles AI Data Center Heat with Industry-First Dual-Side Cooled 650V GaN Device.
As AI data centers push rack power limits from 120 kW toward megawatt territory, space and thermal management are hitting a critical bottleneck. To break the logjam, Renesas Electronics has rolled out the industry’s first 650V GaN device featuring dual-side cooling, a chip purpose-built to handle high-density power conversion for next-generation 800V HVDC AI architectures.
The new D-Mode device (TP65H020G4PLSGBD) delivers an ultra-low 20-milliohm (m?) on-resistance, but the real story is in the packaging.
Moving away from conventional top-side cooling, the ultra-compact 8x8mm PQFN package dissipates heat from both the top and bottom. The result is a 10% drop in top-side thermal impedance packed into a footprint that is 57% smaller than standard 10x15mm TOLT packages.
Built on the company’s Gen IV Plus GaN architecture, the chip is designed for heavy-duty AI environments operating up to 700V. It’s explicitly targeted at the 800V DC/DC intermediate bus converter (IBC) stage, where power is stepped down to 48V, 12V, or 6V—as well as the battery backup (BBU) and capacitor bank (CBU) stages of sidecar power racks.
For power design engineers, the device checks a lot of boxes to keep the bill of materials (BOM) in check. It features a low gate charge, a built-in freewheeling diode with minimal reverse recovery, and a high threshold voltage that runs without a negative gate bias.
Crucially, teams don’t need a specialized E-mode driver; they can drive the chip with a standard silicon gate driver and push into the MHz frequency range to shrink the size of surrounding passive components.
Developed in collaboration with major AI infrastructure customers to ensure a standardized footprint, the dual-side-cooled GaN acts as a linchpin for OEMs, ODMs, and hyperscalers migrating to 800V setups.
Renesas has already validated the approach in silicon. A 6kW, 800V-to-48V LLC DC transformer (DCX) reference design, managed by a Renesas RA6T3 MCU, achieved a massive power density of 2.6 kW/in³.
In per-module testing, the dual-side-cooled board measured 0.21% higher in full-load efficiency than an equivalent TOLT-based design, while the smaller package freed up critical PCB real estate for a better-matched layout. Similar gains are being seen in 800V-to-12V and 6V IBC reference designs.
Renesas is currently sampling the device to major OEMs and ODMs, and plans to showcase the hardware as part of its comprehensive 800V power portfolio at the OCP Global Summit in San Jose, California, from October 12–15.
Leadership Comment
“Customers building megawatt-scale AI data centers are running out of board space and thermal headroom before they hit their power limits,” said John Wiggenhorn, Senior Product Line Director of High-Voltage GaN at Renesas. “With the industry’s first dual-side-cooled 650V GaN, we cool the device from both sides and cut the footprint significantly, so designers can move more power through the intermediate bus without redrawing the board or adding more cooling hardware. And because it keeps the operational simplicity of the silicon gate drive customers already use, it’s an extremely easy upgrade.”
Availability
The TP65H020G4PLSGBD is sampling today. Mass production is planned for mid-2027.
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