Lately, it has been seen that there is an increasing demand for its 3nm design services for custom ASICs reports Sondrel. 3nm is needed for the next generation of products, particularly AI-based designs that require immense compute power to process the huge amounts of data being processed.
3nm design not only offers a significant scale improvement in power and area, but it also adds enhanced capabilities that leverage Sondrel’s significant investment in cutting edge SOC design flows, building on its expertise in designing ultra-complex ASICs at 5nm.
This combination of performance, power and area improvement, enhanced by accessing best-in-class 3rd party IP, helps Sondrel’s chip designers to stay ahead of system-level demands.
3nm design process technology offers several advantages over its predecessors.
– Higher Transistor Density: Semiconductor devices manufactured using the 3nm process can pack more transistors into the same area compared to chips based on 5nm. This increased transistor density directly enhances the chip’s performance.
– Performance Improvement: 3nm process enables better performance in terms of speed and computational capabilities. Devices utilizing this technology exhibit enhanced responsiveness and efficiency.
– Improved Energy Efficiency: Chips fabricated with 3nm process consume less power while maintaining or even improving their performance. This translates to longer battery life for mobile devices and reduced energy consumption in data centres.
Graham Curren, Sondrel’s founder and CEO, said, “We have always specialised in being at the leading edge of technology. Companies come to us because we continually push the envelope to create ultra-complex ASICs that deliver the innovation that our customers need to stay as market leaders. Every step down in process node means billions more transistors for the high compute performances required and each one has to be perfect for the chip to function correctly, so we invest in state-of-the-art EDA tools and develop our own rigorous methodologies for chip design. At 3nm, a custom chip can have several hundred billion transistors so customers need to work with a company that they can trust to deliver their ASIC design on time and within budget.”
Ed Loverseed, Sondrel’s Head of Engineering, added, “We are all about reducing risk for the customer as much as possible. Our customers have frequent interactions with us right from the discovery and specification stage to ensure the project is on track. Importantly, they don’t have any problems to deal with as we handle all of them. This allows our customers to focus their energies on servicing their customers and to concentrate on their specialities of IP development, software, marketing, and product roadmaps. Our aim is to always provide the best client experience which is why customers come back to us with new projects time after time as they know we will deliver a high-quality device. This high level of trust is really important as creating a new chip at these cutting-edge nodes costs millions so it has to be right first time.”
Key to this is managing the various teams of engineers that work on different aspects of each project over the time taken to design a chip and that requires very experienced project management skills. “We have been doing this for over twenty years and so these skills are honed and robust so we know that we will always be able to deliver each project on time and within budget with a very high level of service,” explained Loverseed. “We are one of a tiny handful of companies able to do this at 3nm.”
For further information: www.sondrel.com
