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Infinity AI, d-Matrix Advance Corsair AI Chips

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Infinity, the Infinity Artificial Intelligence Institute, an early-stage AI infrastructure research company developing the software layer that makes AI chips inference-ready, has unveiled a new case study highlighting tools built for Ignition, its autonomous research and tool-building agent.

Infinity AI, d-Matrix Corsair Inference Chip Software The Volt Post

Ignition is designed to generate, test and optimize the low-level compute kernels, compilers, profilers, debuggers and SDKs that determine how efficiently AI models run on a chip. Developed as part of a design partnership with d-Matrix for its SRAM-based Corsair inference accelerator, the work is aimed at cutting the time chip companies need to move new hardware from development to mass-market deployment.

The case study also offers a practical example of ongoing recursive self-improvement (RSI), an AI system that can research and build parts of the training and inference software stack needed for the next generation of AI systems.

For AI chipmakers, the challenge is often not the underlying hardware. A promising accelerator can still struggle to reach production if it lacks a mature software stack. NVIDIA’s two-decade investment in CUDA is a well-known example of how powerful that software advantage can be.

As inference takes up an increasingly large share of industry-wide AI compute spending, building the software required to fully utilize new architectures has become an even more important bottleneck.

Infinity’s approach is designed to address that problem by allowing its tools to autonomously iterate on hardware representations and kernel designs, reducing the need for large teams of specialized kernel engineers and years of software development for every new chip.

How the result was achieved

Corsair takes a different approach from conventional GPUs. The memory-centric accelerator integrates compute closely with on-chip SRAM, helping avoid the memory-bandwidth bottlenecks that can limit GPU-based inference.

Running a model such as Qwen3 efficiently on Corsair required a different kind of optimization.

Instead of treating the chip like a conventional GPU, the team had to map weights, activations and cache across a hierarchy of chiplets, gangs, slices, cores and SRAM banks.

Infinity and d-Matrix divided the workload across four techniques:

  • Pipelining: Work was distributed across the card’s two packages, with model layers split to reduce data transfers between packages.
  • Tensor parallelism: Dense compute, including Q/K/V, output projection and MLP layers, was sharded across 16 hardware gangs.
  • Head-parallel attention: Each attention head in Qwen3 was assigned to its own gang, eliminating the need for cross-gang communication.
  • Batch parallelism: Each sequence’s KV cache and state were isolated to dedicated slices.

Because Corsair’s SRAM can keep weights resident during both prefill and decode, the teams also implemented explicit lifetime tracking. This allowed expensive parameters to remain in place while transient activation memory was aggressively recycled, increasing usable memory capacity without repeatedly moving weights.

The optimization process was supported by three purpose-built tools.

Hardware probing and profiling provided an empirical view of instruction costs and memory behavior on the actual Corsair hardware, helping the team build a performance model based on real measurements.

MemoryScope, Infinity’s compiler, searched through memory-placement and parallelism configurations to balance capacity, lifecycle and locality. It was paired with a Graph and Memory Sanitizer that statically checked memory correctness before code was executed on the chip.

The third component was agentic debugging, which allowed the system to drive breakpoints and inspect memory throughout the model’s load, prefill and decode stages. This helped identify and localize numerical errors during optimization.

Together, the tools gave Infinity and d-Matrix a way to automate much of the low-level software work required to turn a specialized AI accelerator into a production-ready inference platform.

Leadership Comment

Infinity AI, d-Matrix Corsair Inference Chip Software The Volt Post“Recursive self-improvement just delivered a scientific breakthrough that will upend the competitive landscape for chips. In a matter of weeks, we built a large part of an alternative to CUDA, which NVIDIA took 20 years to perfect. The tooling we developed for Infinity’s Ignition in the process will speed up turnaround times for future design partnerships,” said Jeremy Nixon, founder and CEO of Infinity.

“As inference scales globally, customers need heterogeneous infrastructure where GPUs and purpose-built accelerators work seamlessly together. Getting there requires the ability to enable models faster on rack-scale hardware,” said Sid Sheth, founder and CEO of d-Matrix. “Working with Infinity, we were able to have models running on production-ready Corsair hardware in days, which means customers can deploy truly heterogeneous compute faster. That’s a breakthrough for the entire ecosystem.”

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TVP BUREAUhttps://thevoltpost.com
TVP Bureau is The Volt Post’s internal Editorial Team, dedicated to providing in-depth coverage of the Tech B2B ecosystem. The team is tasked with tracking the latest trends and developments across the tech industry, with a strong focus on emerging technologies and innovations. They are responsible for creating insightful editorial content, managing event coverage, and conducting research on new breakthroughs shaping the industry. TVP Bureau also plays a key role in ensuring that The Volt Post remains a trusted resource by staying ahead of the curve in reporting real-time news, views, and strategic industry insights

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