Chennai-based Aheesa Digital Innovations has successfully taped out India’s first domestically designed RISC-V network SoC, the VIHAAN-I on a mature 28-nm process node.
This breakthrough positions India as a growing force in indigenous chip design for broadband and networking applications.
Key Features and Capabilities
The VIHAAN-IÂ RISC-V network SoCÂ integrates C-DAC‘s VEGA RISC-V processor core (developed under the Digital India RISC-V initiative), optimized for high-performance networking tasks. It supports GPON/EPON Optical Network Terminal (ONT) features, making it ideal for telecom, broadband access, and edge computing.
The design emphasizes end-to-end Indian engineering, from architecture to verification, and includes reference platforms like Aheesa Seshnag with OS, drivers, and toolchains for local manufacturers.
Backed by the Ministry of Electronics and IT (MeitY) through the Design Linked Incentive (DLI) scheme, Aheesa’s achievement highlights the nation’s push toward semiconductor self-reliance. The tapeout paves the way for production-ready chips targeting Indian OEMs and telecom operators by early 2026.
Key Features of Aheesa VIHAAN-I SoC
Aheesa’s VIHAAN-I represents India’s first domestically designed RISC-V network SoC, taped out on a mature 28-nm process node.
Core Architecture
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Processor: Built around C-DAC’s 64-bit VEGA RISC-V core (developed under Digital India RISC-V initiative), optimized for high-performance networking and broadband applications.
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Process Node: Fabricated on 28-nm technology for cost-effective, reliable production suitable for optical fiber access networks.?
Connectivity & Interfaces
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Supports GPON/EPON Optical Network Terminal (ONT) features for telecom broadband deployment.
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Essential network interfaces including PCIe 3.0, USB 3.0, and standard connectivity options required for broadband communications.?
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FPGA demos showcase 4x 1G Ethernet (1 WAN + 3 LAN bridged), DDR4 memory, UART, SPI, I2C, GPIO, timers, watchdog, AXI4 interconnects, and APB bridge.
Security & Boot
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Includes Secure Boot and advanced security enhancements for trusted network operations.?
Software Ecosystem
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Runs Aheesa Router OS (AROS) based on OpenWRT, supporting:
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Static/dynamic IP configuration
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NAT, port triggering/forwarding
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Stateful firewall
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DNS, DHCP
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IPv4/IPv6 support
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SD-WAN routing functionalities
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Complete software stack with Primary Boot Loader (PBL), U-Boot, bare metal binaries, drivers, and toolchains.?
Target Applications
Designed as merchant silicon for OEMs/ODMs, the VIHAAN-I integrates compute, broadband access, and system control on a single chip. It ships with the Aheesa Seshnag reference platform for rapid deployment in Indian telecom and networking products, targeting availability in Q1 2026.
Leadership Comments
Sridharan Mani, CEO and Founder of Aheesa Digital Innovations, shared: “This tapeout of VIHAAN-I marks a historic moment for Indian semiconductor innovation. By leveraging open RISC-V architecture and C-DAC’s VEGA core, we’ve created a fully indigenous networking SoC that empowers local telecom growth while reducing import dependency.”
Swaroop Adusumilli, key team member, added: “Our RISC-V test suite and end-to-end design validation demonstrate India’s readiness for global chip markets. This is dedicated to the RISC-V community and the vision of Atmanirbhar Bharat.”
This development aligns with India’s broader RISC-V ecosystem, including efforts from IIT Madras, C-DAC, and other startups, accelerating custom silicon for 5G, IoT, and cybersecurity.
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