Semidynamics announces that UPMEM has chosen Semidynamics as its primary supplier for the next-gen LPDDR5X Processing In Memory device.
Any AI or LLM model may be seamlessly and effectively integrated with the conventional RISC-V architecture thanks to the embedded Tensor Unit and the long latency data access optimizer Gazillion.
Model inference will be possible at the highest industry performance and energy level for a single chip because to the substantial processing capabilities (8 TFLOPs FP16/BF16, 16 TOPs int8) and the enormous internal bandwidth (102.4GB/s) with low energy data access (1pJ/bit).
Key Comments
Gilles Hamou, CEO of UPMEM, said, “SemiDynamics GenAI compute IP combines the power and efficiency needed for our disruptive Processing In Memory DRAM chips for mobile. We also appreciate their use of RISC-V architecture as well as involvement in the RISC-V eco-system. Our combined technologies provide the only solution to be powerful enough and sufficiently energy and cost effective to compute most generative AI compute on the smartphone.”
Roger Espasa, CEO of Semidynamics, added, “We are very happy to work with UPMEM and to support them with their Process In Memory approach. This is an extremely innovative way to enable deployment of Large Language AI models and we look forward to a long-term partnership with UPMEM.”
