SiFive announced its second-generation Intelligence family of RISC-V IP, marking a significant leap in the rapidly growing RISC-V ecosystem and in the advancement of artificial intelligence hardware solutions.
The launch brings five new RISC-V-based processor IPs designed to accelerate AI workloads across a diverse set of applications, from deeply embedded edge devices to high-performance data centers.
Second-Generation Intelligence Family Overview
The new lineup comprises two entirely new products, the X160 Gen 2 and X180 Gen 2, along with upgraded versions of the X280 Gen 2, X390 Gen 2, and XM Gen 2 cores.
These cores blend advanced scalar, vector, and — in the case of the XM — matrix compute capabilities, providing tailored performance for modern AI workloads and edge computing needs.
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The X160 Gen 2 and X180 Gen 2 are aimed at far edge computing and IoT, offering efficiency and AI functionality in constrained environments such as automotive, autonomous robotics, industrial automation, and smart IoT.
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The upgraded X280 and X390 Gen 2 focus on increasing throughput, efficient AI acceleration, and enhanced configurability, making them suitable for a wide array of AI and ML tasks.
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The XM Gen 2, positioned for data center-class AI, boasts 16 tera-operations per second (TOPS) of INT8 compute per cluster, showing a strong orientation for large language models and generative AI.
Key Innovations and Features
One of the most prominent innovations in this new RISC-V IP generation is the heightened integration of vector and matrix processing capabilities alongside traditional scalar operations.
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The architecture can now process multiple data points concurrently, significantly minimizing instruction overhead and power consumption — a crucial benefit for AI models that operate with smaller data formats.
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SiFive has introduced advanced interfaces: the Scalar Coprocessor Interface (SCI) and the Vector Coprocessor Interface (VCI). These allow the new IPs to function efficiently as Accelerator Control Units (ACUs), supporting flexible integration with AI accelerators and providing both low-latency and high-bandwidth access to CPU and vector registers, respectively.
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Real-world improvements are demonstrated, with the X160 Gen 2 reportedly achieving twice the performance of comparable solutions in common AI edge tasks such as keyword spotting, image classification, and anomaly detection.
Strategic Context for RISC-V and AI
The announcement comes as RISC-V is recognized globally as a primary driver of open, scalable compute architectures, and as the AI workload market booms. SiFive’s second-generation Intelligence IP is explicitly designed to accelerate customers’ design cycles, speed time-to-market, and offer configurability for varied applications ranging from wearables and smart home devices to automotive systems and large-scale data centers.
Leadership Comment
Patrick Little, CEO of SiFive, commented:
“AI is catalyzing the next era of the RISC-V revolution. We’re seeing strong traction, including adoption of the new X100 series by two Tier 1 U.S. semiconductor companies. Our new second-generation Intelligence IP builds on this momentum, adding new features and configurability to accelerate our customers’ designs and time to market.”
Industry Impact
The new second-generation Intelligence family demonstrates SiFive’s commitment to moving RISC-V forward as a viable open alternative to proprietary processor architectures, addressing performance, configurability, and energy efficiency to meet rapidly growing AI requirements





