The Low-Power Double Data Rate 6 (LPDDR6) design and test solution, a comprehensive design and test solution to support the upcoming memory system technological wave, was unveiled by Keysight Technologies. By offering new test automation techniques that are essential for developing AI, particularly in mobile and edge devices, the solution greatly enhances device and system validation.
The growing need for AI, high-performance computing, and energy-efficient mobile apps is changing the memory business. LPDDR6 is an essential update for modern devices since it greatly improves performance and efficiency to meet the demands of next-generation compute systems.
As next-generation memory chips like LPDDR6, HBM4, and GDDR7 have become more widely used, test complexity has increased. To guarantee performance and dependability, these technologies require sophisticated testing techniques, and cutting test times without sacrificing accuracy is a never-ending task.
Keysight’s complete workflow solution consists of transmitter and receiver test applications and the Advanced Design System (ADS) Memory Designer workflow solution.
The LPDDR6 test solution can be paired with Keysight EDA software and the Keysight Memory Designer bundle to achieve faster design confidence from simulation to verification and test. The LPDDR6 test automation solution is based on Keysight’s UXR oscilloscope and high-performance M8040A Bit Error Ratio Tester.
The impact of LPDDR6 is anticipated to extend beyond mobile devices. Because of its high performance and power efficiency, the new memory standard is especially well-suited for edge applications where striking a balance between processing power and energy consumption is critical, such as AI and machine learning applications, high-speed digital computing, automotive systems, and data centers.
Key Benefits of Keysight’s LPDDR6 Test Solution:
Accelerate Time-to-Market with Advanced Transmitter Testing
- Reduce validation time with fully automated compliance testing and characterization
- Capture precise measurements quickly using industry-leading low-noise technology
- Debug design issues faster with streamlined data analysis tools
- Analyze device BER performance with extrapolated eye mask margin testing
- Achieve accurate signal measurements directly from BGA packages with specialized de-embedding capabilities
Optimize Device Performance with Comprehensive Receiver Testing
- Validate designs confidently using proven Bit Error Ratio testing methodology
- Pinpoint performance issues early by testing against multiple jitter, crosstalk, and noise scenarios
- Maximize signal integrity through detailed BER analysis and receiver equalization optimization
- Ensure high interoperability with both device and host controller validation
Deliver Next-Generation Memory Solutions
- Enable faster user experiences with higher data rates support
- Extend battery life and reduce power consumption in mobile and data center applications
- Build more reliable products with enhanced data integrity and system stability features
Leadership Comments
Dr. Joachim Peerlings, Vice President and General Manager, Network and Datacenter Solutions, Keysight, said: “As a leader in memory design and test solutions, Keysight continues to collaborate with JEDEC to develop the LPDDR6 standard. This new LPDDR6 standard is set to revolutionize the market, offering unprecedented speed, efficiency, and reliability, enabling the industry’s AI Edge rollout. As the deployment and use of next-generation memory devices are growing, Keysight has achieved a significant milestone in enabling faster time to market for LPDDR6 memory designs.”
The new receiver and transmitter solution will be shown to the public for the first time at DesignCon 2025, Jan 29-30, at booth number 1039 in Santa Clara, California.