An agreement to build a high-performance system-on-chip (SoC) for software-defined vehicles (SDVs) was announced by Honda Motor and Renesas Electronics. With a world-class power efficiency of 20 TOPS/W and cutting-edge AI performance of 2,000*2 TOPS, the new SoC*¹ is expected to be used in future models of Honda’s new electric vehicle (EV) series, the “Honda 0 Zero Series,” particularly those that will be introduced in the late 2020s. Honda made the announcement at a press conference on January 7 at CES 2025 in Las Vegas, Nevada.
With the Honda 0 Series, Honda is creating unique SDVs to offer a mobility experience tailored to each individual customer. A centralized E/E design, which integrates several electronic control units (ECUs) in charge of managing vehicle operations into a single ECU, will be used by the Honda 0 Series.
Powertrain control, comfort features, Advanced Driver Assistance Systems (ADAS), and Automated Driving (AD) are all managed by the core ECU, which is the central component of the SDV.
The ECU needs a SoC that minimizes any increase in power consumption while offering better processing performance than conventional systems in order to accomplish this.
Renesas is dedicated to offering semiconductor solutions for the automotive industry that let automakers create SDVs. Through the integration of AI accelerators*4 into its SoC and the utilization of multi-die chiplet technology*3, Renesas’ R-Car solutions provide enhanced AI performance with customizable capabilities.
Honda and Renesas agreed to create a high-performance SoC computing solution for core ECUs in order to achieve Honda’s goal for SDVs. The cutting-edge 3-nm automotive manufacturing technology from TSMC can also significantly lower the power consumption of this SoC.
It also implements a system that combines an AI accelerator tailored for AI software created independently by Honda with Renesas’ generic fifth-generation (Gen 5) R-Car X5 SoC series using multi-die chiplet technology.
The system hopes to attain one of the best AI results in the industry while maintaining power efficiency with this combination. With minimal power consumption, the SoC chiplet solution will deliver the AI performance needed for sophisticated features like AD.
Chiplet technology offers future updates for functional and performance enhancements as well as the freedom to design customized solutions
For many years, Honda and Renesas have worked closely together. Customers’ mobility experience will be improved by this collaboration, which will hasten the Honda 0 Series’ integration of cutting-edge semiconductor and software advances.
*1 Renesas estimate as of January 2025
*2 Tera Operations Per Second (TOPS) is a metric of AI processing performance and measures the number of operations that can be performed per second. Based on a sparse AI model.
*3 Technology to build a system by combining multiple chips with different functions
*4 Hardware designed for high-speed and high-efficiency AI (artificial intelligence) computational processing
