Synopsys announced the expansion of its industry-leading hardware-assisted verification (HAV) portfolio with new HAPS prototyping and ZeBu emulation systems using the latest AMD Versal Premium VP1902 adaptive SoC.
The Next Generation HAPS-200 Prototyping And ZeBu-200 Emulation Systems Deliver:
- Improved runtime performance, better compile time and improved debug productivity.
- Built on new Synopsys Emulation and Prototyping (EP-Ready) Hardware.
- Optimizes customer return on investment by enabling emulation and prototyping use cases via reconfiguration and optimized software.
- ZeBu Server 5 is enhanced to deliver industry-leading scalability beyond 60 billion gates (BG) to address the escalating hardware and software complexity in SoC and multi-die designs.
- It continues to offer industry-best density to optimize data center space utilization.
2X Performance Increase and Advanced Debug Capabilities
Compared to the HAPS-100, the Synopsys HAPS-200 prototyping system provides 4X better debug performance, faster compilation, and industry-leading runtime performance.
Utilizing the current HAPS-100 environment, it facilitates mixed HAPS-200/100 system configurations that can scale from single FPGA to multi-rack configurations with a maximum capacity of 10.8 BG.
The Synopsys ZeBu-200 emulation system reduces turnaround time and increases development productivity by providing up to 2X higher runtime performance and faster compilation time than the previous generation ZeBu EP2, while also increasing design capacity to up to 15.4 BG.
It offers 200 GB of debug trace memory per module, up to 8X greater debug bandwidth, and enhanced work scheduling and relocation.
Synopsys EP-Ready Hardware Platform
The Synopsys EP-Ready Hardware platform serves as the foundation for the HAPS-200 and ZeBu-200 systems, which maximize return on investment for clients and do away with the necessity to determine the precise ratio of prototype and emulation hardware up front.
Hubs and cables are supported by the EP-Ready Hardware platform for scalable and direct connectivity. Through the transactors and speed adapters, users can take advantage of the wide range of solutions for industry-leading interface protocols.
Increasing Scalability for Multi-Die Designs and Accelerating Software Bring-Up
Already in use with customers leveraging HAPS prototyping, Synopsys extends its methodology of “Modular HAV” to ZeBu Server 5, growing its industry leading scalability beyond 60 BG to meet the industry’s growing emulation capacity needs, to significantly reduce compile time and compute resources, and to enable emulation for the largest multi-die designs.
The Modular HAV methodology utilizes interface protocol solutions that leverage Synopsys’ broad portfolio of complete, silicon-proven interface IP.
In addition, Synopsys hybrid technology combines the use of a virtual model running on a host server connected to an HAV system. Synopsys Virtualizer™ now supports multi-threading technology. This advanced technology significantly accelerates software bring-up processes, such as enabling a full Android boot in less than 10 minutes.
Leadership Comments
“With the industry approaching 100s of billions of gates per chip and 100s of millions of lines of software code in SoC and multi-die solutions, verification of advanced designs poses never-before seen challenges,” said Ravi Subramanian, chief product management officer, Synopsys. “Continuing our strong partnership with AMD, our new systems deliver the highest HAV performance while offering the ultimate flexibility between prototyping and emulation use. Industry leaders are adopting Synopsys EP-Ready Hardware platforms for silicon to system verification and validation.”
“With the increasing market requirements for handling large AI computational data sets driving the need for enormous GPU and CPU computational power, the development time for NVIDIA’s next generation AI systems have become highly compressed to a yearly release cycle, necessitating best-in-class prototyping solutions,” said Narendra Konda, vice president, Hardware Engineering at NVIDIA. “Synopsys HAPS-200 offers the fastest prototyping speed in the industry. The 50 MHz performance we have been able to achieve with HAPS-200 has been key to boosting productivity of our software development teams. We are looking forward to scaling our HAPS-200 deployment to take full advantage for our software development teams.”
“The future of emulation and prototyping demands unprecedented performance, adaptability, and scalability,” said Salil Raje, senior vice president and general manager, Adaptive and Embedded Computing Group at AMD. “By integrating the AMD Versal Premium VP1902 adaptive SoC, with its industry-leading capacity*, performance, and debug capabilities, into Synopsys’ EP-Ready platforms we’re not only improving performance metrics, we’re also transforming how engineering teams can validate and optimize their most ambitious new ASIC and SoC designs. Our longstanding partnership with Synopsys empowers design teams to tackle their most complex verification challenges, from AI/ML workloads to multi-die architectures, while dramatically accelerating time to market.”
“Synopsys is a key member of Arm Total Design, bringing critical tools and the advanced HAV capabilities to quickly and reliably validate solutions built on Arm Compute Subsystems (CSS),” said Kevork Kechichian, executive vice president, Solutions Engineering, Arm. “The new ZeBu-200 and HAPS-200 hardware platforms will also assist our mutual customers in integrating Arm CSS into their designs with improved turnaround times to meet the demanding requirements for complex data center infrastructure and automotive systems.”
Availability & Additional Resources
The Synopsys HAPS-200 prototyping system is available now. The Synopsys ZeBu-200 emulation system is available now for early access customers.
