Blueshift Memory has revealed a reference design for a RISC-V processor that tackles the Memory Wall and the Energy Wall, two issues that the computing sector is currently dealing with.
The benchmarked calculation performance of the BlueFive RISC-V processor reference architecture can be five to fifty times quicker, depending on the computing language and application.
According to its official release, try eliminating needless data movement, the creative CPU design also reduces energy consumption by 50% to 65%.
The demands of AI are predicted to create a 160% increase in data center power usage between 2024 and 2030, according to Goldman Sachs.
The OpenHW Group’s open-source RISC-V core serves as the foundation for the BlueFive CPU reference architecture. The Yonder smart cache and BlueBlaze intelligent memory controller from Blueshift Memory are integrated into the CPU design to actively manage the data, lowering memory-to-CPU latency to zero while also speeding up computations and conserving energy.
Although Blueshift Memory’s non-Von Neumann computer architecture functions best when combined with both the memory and the CPU, its cutting-edge memory controller technology still provides a number of advantages when used alone or in conjunction with either of these components.
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“The hardware was initially created under our successful Innovation UK Smart grant project, and it has since been refined as a reference design for a standalone processor. We are creating the software environment for this CPU with TensorFlow, Redis and C/C++ libraries, which will also make it accessible for Python,” said Peter Marosan, founder and CTO of Blueshift Memory.
“Our CPU design has been validated in FPGA using the industry-standard STREAM benchmark, as well as with real-life applications like computer vision AI and the Redis in-memory database,” said Dr Sarmad Adeel, Senior Embedded Systems Engineer at Blueshift Memory.
“Our design is already validated on hardware, unlike other CPU solutions that aim to accelerate calculation, or offer only simulated results. It specifically addresses the Memory Wall — the fundamental problem that memory technology has fallen behind processor advances, and is holding back progress,” said Helen Duncan, CEO of Blueshift Memory. “We are already working with a commercial partner who will be a channel for our RISC-V solution. We are additionally making this reference design available for other customers to use, to create their own high-efficiency CPU designs.”
“We are collaborating with a manufacturer in SE Asia as well, to create a Blueshift Memory-enabled high bandwidth memory chip, and we will make a further announcement about this very soon,” said Peter Marosan.
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