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Indian RISC-V Startup InCore Slashes SoC Design Time to Minutes

InCore Semiconductors Unveils Next-Generation SoC Generator Supporting 28nm Multicore Chips.

Indian RISC-V Startup InCore Slashes SoC Design Time to Minutes with Advanced Automation the volt post
A futuristic chip emerges from a glowing maze-like circuit, symbolizing rapid SoC design automation and deterministic transformation from logic to silicon.
© 2025 The Volt Post. All rights reserved.

InCore Semiconductors, an Indian RISC-V startup spun out of the SHAKTI processor initiative at IIT Madras, has made a major breakthrough in system-on-chip (SoC) design automation. The company announced that its proprietary SoC Generator tool can now take a chip design from high-level specification to FPGA-ready RTL in under 10 minutes, now extending support for 28nm multicore SoCs.

This marks a significant leap from its earlier 40nm success, reducing design cycles from weeks or months to mere minutes, while producing a complete documentation package, hardware-ready RTL, bootable software stack, and configurable interconnects.

From Research to Real Silicon

In 2024, InCore successfully validated a six-core RISC-V design on a 40nm TSMC node using its SoC Generator. This year, the startup is advancing that capability to support a multicore 28nm SoC platform.

The upcoming design, currently under validation, includes high-speed interfaces, a software-bootable multicore CPU, and customizable network-on-chip (NoC) interconnects.

The current flow is structured to support real production environments. It automatically generates RTL, testbenches, documentation, constraint files, floorplans, and Python scripts for simulation. All outputs are deterministic, reproducible, and ready for downstream integration with existing EDA flows.

CTO’s Vision: Determinism Over Generative AI

Neel Gala, Co-founder and CTO of InCore, emphasized the importance of deterministic design automation in semiconductor workflows. “We don’t use generative AI in the SoC Generator because SoC design is deterministic,” said Gala. “You run the flow a million times, you should get the exact same result. Design cannot be probabilistic.”

He clarified that while AI tools may assist in brainstorming or ideation, production-ready hardware needs verifiable and repeatable outcomes, which the SoC Generator achieves through Python and BlueSpec-based control flows.

CEO’s Focus: Empowering India’s Fabless Ecosystem

G S Madhusudan, CEO of InCore Semiconductors, highlighted how this platform helps India’s growing semiconductor design ecosystem overcome high barriers to entry.

“This business model is tailor-made for India’s fabless ambitions,” said Madhusudan. “With reusable flows and plug-and-play IP modules, startups and design houses can rapidly prototype and tape out multiple SoC variants without high engineering overheads.”

Madhusudan added that the platform’s compatibility with India’s open-core efforts like SHAKTI and government initiatives such as DIR-V makes it a timely enabler of domestic innovation.

How the SoC Generator Works

The platform uses a YAML-based specification approach to configure various modules, allowing for quick composition of SoCs by selecting CPU cores, interconnects, peripherals, and external IP.

This structure allows engineering teams to build and modify their designs with agility, iterate in hours, and respond quickly to changing market demands.

Artifacts generated include:

  • Synthesizable RTL
  • RDL for register maps
  • Custom floorplans
  • Testbenches
  • Documentation
  • Software SDK for PlatformIO and Eclipse
  • Timing constraints for physical design

The generator integrates seamlessly with third-party EDA tools and IP modules from vendors like Synopsys, Arm, and others, as well as InCore’s own RISC-V processor cores and NoCs.

Modular Design, Open Ecosystem

One of the key differentiators of the SoC Generator is its modular IP support. Whether startups are using InCore’s own CPUs or licensed third-party blocks, the platform allows users to plug in IPs through a clean interface.

It also supports dynamic configuration of NoC parameters to balance bandwidth, latency, and power targets. Teams can choose single-core or multicore architectures, and route buses accordingly. With an open licensing model, startups can pay as they grow, while larger enterprises can opt for complete site licenses.

Indian RISC-V Startup InCore Slashes SoC Design Time to Minutes with Advanced Automation the volt post
A futuristic chip emerges from a glowing maze-like circuit, symbolizing rapid SoC design automation and deterministic transformation from logic to silicon.
© 2025 The Volt Post. All rights reserved.

Built for Scalability: From Embedded to High-Performance Computing

Although the platform is currently used for embedded and industrial applications, InCore is designing it with scalability in mind.

The next roadmap phase includes support for chiplet integration, advanced power modeling, and timing-aware synthesis—all critical for AI accelerators, 5G base stations, and safety-critical automotive SoCs.

The ability to reuse IP and flows across these domains helps customers reduce development risk and cost.

Strong Alignment with India’s National Semiconductor Goals

InCore’s growth aligns closely with India’s strategic push into the semiconductor domain. The government-backed DIR-V program, along with initiatives like the India Semiconductor Mission, aims to foster a vibrant ecosystem of IP creators, chip designers, and EDA innovators.

With its academic roots and industrial agility, InCore is uniquely positioned to bridge this gap. The company’s tools reduce the technical debt and complexity of SoC creation, enabling India’s fabless ecosystem to compete globally in sectors such as industrial automation, smart cities, communications, and defense electronics.

The Road Ahead: From FPGA to Foundry

InCore plans to launch its first 28nm tape-out based on the new generator output by early 2026. The chip will include multiple RISC-V cores, secure boot features, and high-speed I/O support, targeting real-world use cases in edge AI and embedded computing.

The startup is also engaging with leading foundries and design services firms to streamline backend integration and ensure silicon success. The SoC Generator’s output is foundry-agnostic and can be tailored to various process technologies, making it attractive for both commercial and academic prototyping.

A Major Leap for India’s Semiconductor Ambitions

InCore Semiconductors has successfully transitioned from research validation to commercial SoC automation.

With support for 28nm multicore designs and a fast-growing library of configurable IP, the company’s platform delivers unprecedented speed, modularity, and confidence in SoC design.

By empowering startups and SMEs to build silicon with fewer resources and shorter timelines, InCore represents the next phase of India’s semiconductor journey—one where deterministic design automation replaces manual toil, and silicon innovation can keep pace with software-level agility.

TVP BUREAU
TVP BUREAUhttps://thevoltpost.com
TVP Bureau is The Volt Post’s internal Editorial Team, dedicated to providing in-depth coverage of the Tech B2B ecosystem. The team is tasked with tracking the latest trends and developments across the tech industry, with a strong focus on emerging technologies and innovations. They are responsible for creating insightful editorial content, managing event coverage, and conducting research on new breakthroughs shaping the industry. TVP Bureau also plays a key role in ensuring that The Volt Post remains a trusted resource by staying ahead of the curve in reporting real-time news, views, and strategic industry insights

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