The CryoMem suite of memory intellectual property, which is intended for usage at the extremely low temperatures needed for Quantum Computing (QC) applications, is now available for license, according to sureCore.
This is because of a consortium that was financed by Innovate UK to create cryo-tolerant semiconductor intellectual property. The project’s goal was to build and demonstrate a variety of foundational intellectual property that designers may license to develop their own unique cryo-CMOS SoC solutions.
By allowing the control electronics to move into the cryostat and be near the qubits, this will aid in accelerating QC scaling.
Paul Wells, sureCore’s CEO, said, “We have successfully tested 180nm sample chips at 77K so we can now start licencing this IP and excitingly, we are also in the middle of evaluating 22FDX demonstrator IP and the plan is to make these available for licencing shortly. Every potential customer who is interested in licensing IP always wants to know if it is silicon proven and can they have an evaluation report. It’s great to be able to say yes, and, not only that, but we can also provide you with a full evaluation board.
“We have just closed a funding round, part of which will enable us to develop this rapidly growing sector of our business. Our success with proven Cryo-CMOS is really going to help accelerate the growth of the QC community by unleashing the power of the fabless business model. The availability of this key enabling Cryo IP which, to date, has been the preserve of the Tier-1 players, will help level the playing field for start-ups struggling to commercialise their novel qubit technologies.”
Project Background
Utilizing its cutting-edge, ultra-low power memory design expertise, sureCore has developed embedded SRAM, Register Files, and Contact Programmable ROM—all essential components of any digital subsystem—that can function at temperatures ranging from 77K (-196°C) to the near-zero temperatures required by Quantum Computers (QCs).
An industry-standard RTL to GDSII physical design path may now be easily adopted because both standard cell and IO cell libraries have been re-characterized for operation at cryogenic temperatures.
One of the main obstacles to QC scaling is the ability to cluster ever-more-complex control circuits near the qubits that need to be kept in the cryostat at cryogenic temperatures.
To prevent the cryostat from experiencing additional thermal burden, it is crucial to minimize the power consumption of the control chip in order to prevent excessive heat. SureCore’s low power design knowledge was crucial in this situation.
Since contemporary semiconductor technology can only function at temperatures as low as -40°C, the control electronics in current QC systems are situated outside the cryostat.
The transistors’ working characteristics significantly alter as the temperature is lowered toward absolute zero. The possibility of creating interface devices that can regulate and observe qubits at cryogenic temperatures is demonstrated by the measurement, comprehension, and modeling of this behavioral shift during the previous several months.
The qubits stored in the cryostat are currently connected to room temperature control devices via costly, cumbersome wiring. A game-changer that will quickly enable QC scaling is allowing QC developers to take use of the fabless design paradigm and construct their own unique cryogenic control SoCs that can be housed alongside the qubits within the cryostat.
Cost, size, and—most importantly—latency reduction are immediate advantages. The demonstrator chip will then be characterized at cryotemperatures in order to further hone and validate the models and enhance performance.
With academic and corporate partners who possess the knowledge and fundamental skills needed to create cryo-tolerant semiconductor intellectual property, the IUK-funded collaboration is a full ecosystem.